Integrated circuit speeds continue to increase and the amount of data communicated between circuits continues to increase to meet the demands of system applications. As data volume increases, the industry continues to develop semiconductor memory devices having more memory to accommodate the increased data requirements. These trends of increasing circuit speeds, increasing data volume, and memory devices having more memory are expected to continue into the future.
Typically, a semiconductor memory device includes a mass-storage memory, such as a dynamic random access memory (DRAM) or a static random access memory (SRAM). The mass-storage memory includes memory cells in one or more memory cell arrays. The memory device can be one integrated circuit chip or multiple integrated circuit chips in a multi-chip package.
Often, the mass-storage memory includes redundant memory cells that can be used for repair. The mass-storage memory is tested at wafer level testing and defective memory cells are identified. The defective memory cells can be hard failures, such as stuck-at-one or stuck-at-zero failures, insufficient data retention times, or any other failure that prevents the device from operating efficiently. Laser-blown fuses on the memory device are blown to replace the defective memory cells with redundant memory cells prior to packaging.
However, during manufacturing a memory device may be harmed by contamination or stresses, such as thermal stress due to packaging, thermal stress sustained in the attachment of a packaged or unpackaged device to a substrate, high-voltage testing, and electro-static discharge. As a result, after manufacturing, the memory device may include defective memory cells that have not been repaired. In addition, the memory device may be harmed again by the customer, such as by mounting the memory device on a substrate and/or in a multi-chip package (MCP).
For these and other reasons there is a need for the present invention.